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1. general description the 74ahc594; 74ahct594 is a high-speed si-gate cmos device and is pin compatible with low-power schottky ttl (lsttl). it is speci?ed in compliance with jedec standard no. 7-a. the 74ahc594; 74ahct594 is an 8-bit, non-inverting, serial-in, parallel-out shift register that feeds an 8-bit d-type storage register. separate clocks (shcp and stcp) and direct overriding clears ( shr and str) are provided on both the shift and storage registers. a serial output (q7s) is provided for cascading purposes. both the shift and storage register clocks are positive-edge triggered. if the user wishes to connect both clocks together, the shift register will always be one count pulse ahead of the storage register. 2. features n balanced propagation delays n all inputs have schmitt-trigger actions n inputs accept voltages higher than v cc n wide supply voltage range from 2.0 v to 5.5 v n 8-bit serial-in, parallel-out shift register with storage n independent direct overriding clears on shift and storage registers n independent clocks for shift and storage registers n latch-up performance exceeds 100 ma per jesd78 class ii n input levels: u for 74ahc594: cmos level u for 74ahct594: ttl level n esd protection: u hbm eia/jesd22-a114e exceeds 2000 v u mm eia/jesd22-a115-a exceeds 200 v u cdm eia/jesd22-c101c exceeds 1000 v n multiple package options n speci?ed from - 40 c to +85 c and from - 40 c to +125 c 3. applications n serial-to parallel data conversion n remote control holding register 74ahc594; 74ahct594 8-bit shift register with output register rev. 02 9 june 2008 product data sheet
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 2 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register 4. ordering information 5. functional diagram table 1. ordering information type number package temperature range name description version 74ahc594 74ahc594d - 40 c to +125 c so16 plastic small outline package; 16 leads; body width 3.9 mm sot109-1 74ahc594db - 40 c to +125 c ssop16 plastic shrink small outline package; 16 leads; body width 5.3 mm sot338-1 74ahc594pw - 40 c to +125 c tssop16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 74ahc594bq - 40 c to +125 c dhvqfn16 plastic dual in-line compatible thermal enhanced very thin quad ?at package; no leads; 16 terminals; body 2.5 3.5 0.85 mm sot763-1 74ahct594 74ahct594d - 40 c to +125 c so16 plastic small outline package; 16 leads; body width 3.9 mm sot109-1 74ahct594db - 40 c to +125 c ssop16 plastic shrink small outline package; 16 leads; body width 5.3 mm sot338-1 74ahct594pw - 40 c to +125 c tssop16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 74ahct594bq - 40 c to +125 c dhvqfn16 plastic dual in-line compatible thermal enhanced very thin quad ?at package; no leads; 16 terminals; body 2.5 3.5 0.85 mm sot763-1 fig 1. functional diagram mbc320 q7 q0 q1 q2 q3 q4 q5 q6 ds shcp shr stcp str 14 10 13 11 12 15 9 1234567 8-stage shift register 8-bit storage register q7s
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 3 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register fig 2. logic symbol fig 3. iec logic symbol mbc319 stcp shcp str shr ds q7s q0 q1 q2 q3 q4 q5 q6 q7 14 10 13 11 12 15 9 1 2 3 4 5 6 7 mbc322 shcp stcp q0 q1 q2 q3 q4 q5 q6 q7 shr str ds 15 9 1 2 3 4 5 6 7 1d 2d c1/ 10 11 14 c2 12 13 r2 srg8 r1 q7s fig 4. logic diagram mbc321 q0 q1 q2 q3 q4 q5 q6 ds shcp shr stcp str d q cp ffsh 0 r stage 0 d q cp ffst 0 r stages 1 to 6 dq q7 dq cp ffsh 7 r stage 7 d q cp ffst 7 r q7s
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 4 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register 6. pinning information 6.1 pinning fig 5. pin con?guration so16 q1 v cc q2 q0 q3 ds q4 str q5 stcp q6 shcp q7 shr gnd q7s 001aae343 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 74ahc594 74ahct594 (1) the die substrate is attached to this pad using conductive die attach material. it can not be used as supply pin or input. fig 6. pin con?guration (t)ssop16 fig 7. pin con?guration dhvqfn16 74ahc594 74ahct594 q1 v cc q2 q0 q3 ds q4 str q5 stcp q6 shcp q7 shr gnd q7s 001aae344 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 001aae345 74ahc594 74ahct594 q7 shr q6 shcp q5 stcp q4 str q3 ds q2 q0 gnd q7s q1 v cc transparent top view 7 10 6 11 5 12 4 13 3 14 2 15 8 9 1 16 terminal 1 index area gnd (1)
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 5 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register 6.2 pin description 7. functional description [1] h = high voltage state; l = low voltage state; - = low to high transition; x = dont care; nc = no change; table 2. pin description symbol pin description q1 1 parallel data output q2 2 parallel data output q3 3 parallel data output q4 4 parallel data output q5 5 parallel data output q6 6 parallel data output q7 7 parallel data output gnd 8 ground (0 v) q7s 9 serial data output shr 10 shift register reset input (active low) shcp 11 shift register clock input stcp 12 storage register clock input str 13 storage register reset input (active low) ds 14 serial data input q0 15 parallel data output v cc 16 supply voltage table 3. function table [1] input output function shcp stcp shr str ds q7s qn x x l x x l nc a low-state on shr only affects the shift register x x x l x nc l a low-state on str only affects the storage register x - l h x l l empty shift register loaded into storage register - x h x h q6s nc logic high level shifted into shift register stage 0. contents of all shift register stages shifted through, e.g. previous state of stage 6 (internal q6s) appears on the serial output (q7s). x - h h x nc qns contents of shift register stages (internal qns) are transferred to the storage register and parallel output stages -- h h x q6s qns contents of shift register shifted through; previous contents of the shift register is transferred to the storage register and the parallel output stages
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 6 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register 8. limiting values [1] the input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] for so16 packages: above 70 c the value of p tot derates linearly at 8 mw/k. for (t)ssop16 packages: above 60 c the value of p tot derates linearly at 5.5 mw/k. for dhvqfn16 packages: above 60 c the value of p tot derates linearly at 4.5 mw/k. fig 8. timing diagram mbc323 q7s q0 str shr stcp ds shcp q1 q6 q7 table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage - 0.5 +7.0 v v i input voltage - 0.5 +7.0 v i ik input clamping current v i < - 0.5 v [1] - 20 - ma i ok output clamping current v o < - 0.5 v or v o >v cc + 0.5 v [1] - 20 +20 ma i o output current v o = - 0.5 v to (v cc + 0.5 v) - 25 +25 ma i cc supply current - +75 ma i gnd ground current - 75 - ma t stg storage temperature - 65 +150 c p tot total power dissipation t amb = - 40 c to +125 c [2] - 500 mw
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 7 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register 9. recommended operating conditions 10. static characteristics table 5. operating conditions symbol parameter conditions min typ max unit 74ahc594 v cc supply voltage 2.0 5.0 5.5 v v i input voltage 0 - 5.5 v v o output voltage 0 - v cc v t amb ambient temperature - 40 +25 +125 c d t/ d v input transition rise and fall rate v cc = 3.0 v to 3.6 v - - 100 ns/v v cc = 4.5 v to 5.5 v - - 20 ns/v 74ahct594 v cc supply voltage 4.5 5.0 5.5 v v i input voltage 0 - 5.5 v v o output voltage 0 - v cc v t amb ambient temperature - 40 +25 +125 c d t/ d v input transition rise and fall rate v cc = 4.5 v to 5.5 v - - 20 ns/v table 6. static characteristics at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions 25 c - 40 c to +85 c - 40 c to +125 c unit min typ max min max min max 74ahc594 v ih high-level input voltage v cc = 2.0 v 1.5 - - 1.5 - 1.5 - v v cc = 3.0 v 2.1 - - 2.1 - 2.1 - v v cc = 5.5 v 3.85 - - 3.85 - 3.85 - v v il low-level input voltage v cc = 2.0 v - - 0.5 - 0.5 - 0.5 v v cc = 3.0 v - - 0.9 - 0.9 - 0.9 v v cc = 5.5 v - - 1.65 - 1.65 - 1.65 v v oh high-level output voltage v i = v ih or v il i o = - 50 m a; v cc = 2.0 v 1.9 2.0 - 1.9 - 1.9 - v i o = - 50 m a; v cc = 3.0 v 2.9 3.0 - 2.9 - 2.9 - v i o = - 50 m a; v cc = 4.5 v 4.4 4.5 - 4.4 - 4.4 - v i o = - 4.0 ma; v cc = 3.0 v 2.58 - - 2.48 - 2.40 - v i o = - 8.0 ma; v cc = 4.5 v 3.94 - - 3.80 - 3.70 - v v ol low-level output voltage v i = v ih or v il i o = 50 m a; v cc = 2.0 v - 0 0.1 - 0.1 - 0.1 v i o = 50 m a; v cc = 3.0 v - 0 0.1 - 0.1 - 0.1 v i o = 50 m a; v cc = 4.5 v - 0 0.1 - 0.1 - 0.1 v i o = 4 ma; v cc = 3.0 v - - 0.36 - 0.44 - 0.55 v i o = 8 ma; v cc = 4.5 v - - 0.36 - 0.44 - 0.55 v
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 8 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register 11. dynamic characteristics i i input leakage current v i = 5.5 v or gnd; v cc =0vto5.5v - - 0.1 - 1.0 - 2.0 m a i cc supply current v i =v cc or gnd; i o = 0 a; v cc = 5.5 v - - 4.0 - 40 - 80 m a c i input capacitance v i =v cc or gnd - 3 10 - 10 - 10 pf 74ahct594 v ih high-level input voltage v cc = 4.5 v to 5.5 v 2.0 - - 2.0 - 2.0 - v v il low-level input voltage v cc = 4.5 v to 5.5 v - - 0.8 - 0.8 - 0.8 v v oh high-level output voltage v i = v ih or v il i o = - 50 m a; v cc = 4.5 v 4.4 4.5 - 4.4 - 4.4 - v i o = - 8.0 ma; v cc = 4.5 v 3.94 - - 3.80 - 3.70 - v v ol low-level output voltage v i = v ih or v il i o = 50 m a; v cc = 4.5 v - 0 0.1 - 0.1 - 0.1 v i o = 8 ma; v cc = 4.5 v - - 0.36 - 0.44 - 0.55 v i i input leakage current v i = 5.5 v or gnd; v cc =0vto5.5v - - 0.1 - 1.0 - 2.0 m a i cc supply current v i =v cc or gnd; i o = 0 a; v cc = 5.5 v - - 4.0 - 40 - 80 m a d i cc additional supply current per input pin; v i =v cc - 2.1 v; other pins at v cc or gnd; i o = 0 a; v cc = 4.5 v to 5.5 v - - 1.35 - 1.5 - 1.5 ma c i input capacitance v i =v cc or gnd - 3 10 - 10 - 10 pf table 6. static characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions 25 c - 40 c to +85 c - 40 c to +125 c unit min typ max min max min max table 7. dynamic characteristics voltages are referenced to gnd (ground = 0 v); for test circuit see figure 15 . symbol parameter conditions 25 c - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max min max 74ahc594 t plh low to high propagation delay shcp to q7s; see figure 9 v cc = 3.0 v to 3.6 v c l = 15 pf - 5.2 8.5 2.2 9.7 2.2 10.6 ns c l = 50 pf - 7.4 11.5 3.0 13.2 3.0 14.3 ns v cc = 4.5 v to 5.5 v c l = 15 pf - 3.8 6.3 1.7 7.2 1.7 7.8 ns c l = 50 pf - 4.8 8.0 2.4 9.1 2.4 10.0 ns
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 9 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register stcp to qn; see figure 10 v cc = 3.0 v to 3.6 v c l = 15 pf - 5.1 8.3 2.3 9.5 2.3 10.6 ns c l = 50 pf - 7.3 11.9 3.3 13.6 3.3 14.7 ns v cc = 4.5 v to 5.5 v c l = 15 pf - 3.5 5.7 1.8 6.5 1.8 7.1 ns c l = 50 pf - 4.8 7.8 2.6 9.0 2.6 9.8 ns t phl high to low propagation delay shcp to q7s; see figure 9 v cc = 3.0 v to 3.6 v c l = 15 pf - 5.5 8.9 2.3 10.2 2.3 11.0 ns c l = 50 pf - 7.4 12.1 3.0 13.9 3.0 15.1 ns v cc = 4.5 v to 5.5 v c l = 15 pf - 4.1 6.7 1.9 7.6 1.9 8.2 ns c l = 50 pf - 5.4 8.8 2.5 10.1 2.5 11.0 ns stcp to qn; see figure 10 v cc = 3.0 v to 3.6 v c l = 15 pf - 5.5 9.1 2.4 10.4 2.4 11.3 ns c l = 50 pf - 7.3 12.0 3.2 13.8 3.2 15.0 ns v cc = 4.5 v to 5.5 v c l = 15 pf - 3.7 6.0 1.9 6.9 1.9 7.5 ns c l = 50 pf - 5.2 8.5 2.6 9.7 2.6 10.5 ns shr to q7s; see figure 13 v cc = 3.0 v to 3.6 v c l = 15 pf - 5.7 9.5 2.3 10.8 2.3 11.7 ns c l = 50 pf - 7.5 12.2 3.6 14.0 3.6 15.2 ns v cc = 4.5 v to 5.5 v c l = 15 pf - 4.1 6.7 2.0 7.6 2.0 8.2 ns c l = 50 pf - 5.4 8.8 2.8 10.1 2.8 11.0 ns str to qn; see figure 14 v cc = 3.0 v to 3.6 v c l = 15 pf - 5.8 9.6 2.8 11.0 2.8 12.0 ns c l = 50 pf - 7.7 12.5 3.8 14.4 3.8 15.6 ns v cc = 4.5 v to 5.5 v c l = 15 pf - 4.1 7.2 2.2 8.2 2.2 8.9 ns c l = 50 pf - 5.4 9.4 3.0 10.7 3.0 11.6 ns f max maximum frequency shcp or stcp; see figure 9 and 10 v cc = 3.0 v to 3.6 v 80 125 - 70 - 65 - mhz v cc = 4.5 v to 5.5 v 90 170 - 80 - 70 - mhz table 7. dynamic characteristics continued voltages are referenced to gnd (ground = 0 v); for test circuit see figure 15 . symbol parameter conditions 25 c - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max min max
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 10 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register t w pulse width shcp and stcp high or low; see figure 9 and 10 v cc = 3.0 v to 3.6 v 6.0 - - 6.5 - 7.0 - ns v cc = 4.5 v to 5.5 v 5.5 - - 6.0 - 6.5 - ns shr and str high or low; see figure 13 and 14 v cc = 3.0 v to 3.6 v 5.0 - - 5.0 - 5.5 - ns v cc = 4.5 v to 5.5 v 5.0 - - 5.2 - 5.7 - ns t su set-up time ds to shcp; see figure 11 v cc = 3.0 v to 3.6 v 3.5 - - 3.5 - 4.0 - ns v cc = 4.5 v to 5.5 v 3.0 - - 3.0 - 3.5 - ns shr to stcp; see figure 12 v cc = 3.0 v to 3.6 v 8.0 - - 9.0 - 9.5 - ns v cc = 4.5 v to 5.5 v 5.0 - - 5.0 - 5.5 - ns shcp to stcp; see figure 10 v cc = 3.0 v to 3.6 v 8.0 - - 8.5 - 9.0 - ns v cc = 4.5 v to 5.5 v 5.0 - - 5.0 - 5.5 - ns t h hold time ds to shcp; see figure 11 v cc = 3.0 v to 3.6 v 1.5 - - 1.5 - 2.0 - ns v cc = 4.5 v to 5.5 v 2.0 - - 2.0 - 2.5 - ns t rec recovery time shr to shcp; see figure 13 v cc = 3.0 v to 3.6 v 4.2 - - 4.8 - 5.3 - ns v cc = 4.5 v to 5.5 v 2.9 - - 3.3 - 3.8 - ns str to stcp; see figure 14 v cc = 3.0 v to 3.6 v 4.6 - - 5.3 - 5.8 - ns v cc = 4.5 v to 5.5 v 3.2 - - 3.7 - 4.3 - ns c pd power dissipation capacitance f i = 1 mhz; v i = gnd to v cc [2] -55- - - - -pf 74ahct594; v cc = 4.5 v to 5.5 v t plh low to high propagation delay shcp to q7s; see figure 9 c l = 15 pf - 3.8 6.3 1.7 7.2 1.7 7.8 ns c l = 50 pf - 4.8 8.0 2.2 9.1 2.2 9.9 ns stcp to qn; see figure 10 c l = 15 pf - 3.5 5.7 1.8 6.5 1.8 7.1 ns c l = 50 pf - 4.6 7.7 2.6 8.8 2.6 9.6 ns table 7. dynamic characteristics continued voltages are referenced to gnd (ground = 0 v); for test circuit see figure 15 . symbol parameter conditions 25 c - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max min max
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 11 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register [1] typical values are measured at nominal supply voltage (v cc = 3.3 v and v cc = 5.0 v). [2] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ s (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; s (c l v cc 2 f o ) = sum of the outputs. t phl high to low propagation delay shcp to q7s; see figure 9 c l = 15 pf - 4.1 6.7 1.8 7.6 1.8 8.3 ns c l = 50 pf - 5.4 8.8 2.4 10.1 2.4 11.0 ns stcp to qn; see figure 10 c l = 15 pf - 3.7 6.1 1.9 6.9 1.9 7.2 ns c l = 50 pf - 5.2 8.5 2.6 9.7 2.6 10.5 ns shr to q7s; see figure 13 c l = 15 pf - 4.3 7.0 2.4 8.0 2.4 8.7 ns c l = 50 pf - 5.4 8.8 2.7 10.1 2.7 11.0 ns str to qn; see figure 14 c l = 15 pf - 4.5 7.4 2.3 8.4 2.3 9.2 ns c l = 50 pf - 5.7 9.4 3.1 10.7 3.1 11.7 ns f max maximum frequency shcp or stcp; see figure 9 and 10 90 160 - 80 - 70 - mhz t w pulse width shcp and stcp high or low; see figure 9 and 10 5.5 - - 6.0 - 6.5 - ns shr and str high or low; see figure 13 and 14 5.2 - - 5.5 - 6.0 - ns t su set-up time ds to shcp; see figure 11 3.0 - - 3.0 - 3.5 - ns shr to stcp; see figure 12 5.0 - - 5.0 - 5.5 - ns shcp to stcp; see figure 10 5.0 - - 5.0 - 5.5 - ns t h hold time ds to shcp; see figure 11 2.0 - - 2.0 - 2.5 - ns t rec recovery time shr to shcp; see figure 13 2.9 - - 3.3 - 3.8 - ns str to stcp; see figure 14 3.4 - - 3.8 - 4.3 - ns c pd power dissipation capacitance f i = 1 mhz; v i = gnd to v cc [2] -55- - - - -pf table 7. dynamic characteristics continued voltages are referenced to gnd (ground = 0 v); for test circuit see figure 15 . symbol parameter conditions 25 c - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max min max
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 12 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register 12. waveforms measurement points are given in t ab le 8 . fig 9. shift register clock pulse width, maximum frequency and input to output propagation delays 001aae341 shcp input q7s output v m t plh t tlh t thl t phl v m t w 1/f max measurement points are given in t ab le 8 . fig 10. shift register clock to storage register clock set-up time and storage clock pulse width, maximum frequency and input to output propagation delays v m t w 1/f max v m v m t su t plh q n outputs stcp input shcp input t phl mla512
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 13 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register measurement points are given in t ab le 8 . the shaded areas indicate when the input is permitted to change for predictable output performance. fig 11. shift register clock to data input set-up and hold times 001aae342 t h t su t h t su v m v m v m q 7 output sh cp input d s input measurement points are given in t ab le 8 . fig 12. storage register reset pulse width, input to output propagation delay and recovery time mbc325 v m t phl v m t rec t w v m stcp input q n outputs str input
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 14 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register measurement points are given in t ab le 8 . fig 13. shift register reset pulse width, input to output propagation delay and recovery time mbc324 v m t phl v m t rec t w v m shcp input q7s output shr input measurement points are given in t ab le 8 . fig 14. shift register reset to storage register clock set-up time mbc326 v m t su v m v m stcp input q n outputs shr input table 8. measurement points type input output v m v m 74ahc594 0.5 v cc 0.5 v cc 74ahct594 1.5 v 0.5 v cc
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 15 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register for test data see t ab le 9 . de?nitions for test circuit: r t = termination resistance should be equal to output impedance z o of the pulse generator. c l = load capacitance including jig and probe capacitance. fig 15. load circuitry for measuring switching times 001aah768 t w t w t r t r t f v m v i negative pulse gnd v i positive pulse gnd 10 % 90 % 90 % 10 % v m v m v m t f v cc dut r t v i v o c l g table 9. test data type input load test v i t r , t f c l 74ahc594 v cc 3.0 ns 15 pf, 50 pf t plh , t phl 74ahct594 3.0 v 3.0 ns 15 pf, 50 pf t plh , t phl
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 16 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register 13. package outline fig 16. package outline sot109-1 (so16) x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot109-1 99-12-27 03-02-19 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale so16: plastic small outline package; 16 leads; body width 3.9 mm sot109-1
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 17 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register fig 17. package outline sot338-1 (ssop16) unit a 1 a 2 a 3 b p cd (1) e (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 1.25 7.9 7.6 1.03 0.63 0.9 0.7 1.00 0.55 8 0 o o 0.13 0.2 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot338-1 99-12-27 03-02-19 (1) w m b p d h e e z e c v m a x a y 1 8 16 9 q a a 1 a 2 l p q detail x l (a ) 3 mo-150 pin 1 index 0 2.5 5 mm scale ssop16: plastic shrink small outline package; 16 leads; body width 5.3 mm sot338-1 a max. 2
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 18 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register fig 18. package outline sot403-1 (tssop16) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot403-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 18 16 9 q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 a max. 1.1 pin 1 index
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 19 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register fig 19. package outline sot763-1 (dhvqfn16) terminal 1 index area 0.5 1 a 1 e h b unit y e 0.2 c references outline version european projection issue date iec jedec jeita mm 3.6 3.4 d h 2.15 1.85 y 1 2.6 2.4 1.15 0.85 e 1 2.5 0.30 0.18 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot763-1 mo-241 - - - - - - 0.5 0.3 l 0.1 v 0.05 w 0 2.5 5 mm scale sot763-1 dhvqfn16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 27 15 10 9 8 1 16 x d e c b a terminal 1 index area a c c b v m w m e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1) 02-10-17 03-01-27
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 20 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register 14. abbreviations 15. revision history table 10. abbreviations acronym description cdm charged device model cmos complementary metal-oxide semiconductor dut device under test esd electrostatic discharge hbm human body model lsttl low-power schottky transistor-transistor logic mm machine model table 11. revision history document id release date data sheet status change notice supersedes 74ahc_ahct594_2 20080609 product data sheet - 74ahc_ahct594_1 modi?cations: ? the format of this data sheet has been redesigned to comply with the new identity guidelines of nxp semiconductors. ? legal texts have been adapted to the new company name where appropriate. ? t ab le 6 : the conditions for input leakage current have been changed. 74ahc_ahct594_1 20060704 product data sheet - -
74ahc_ahct594_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 9 june 2008 21 of 22 nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register 16. legal information 16.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 16.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 16.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 16.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 17. contact information for more information, please visit: http://www .nxp.com for sales of?ce addresses, please send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors 74ahc594; 74ahct594 8-bit shift register with output register ? nxp b.v. 2008. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 9 june 2008 document identifier: 74ahc_ahct594_2 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 18. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 functional description . . . . . . . . . . . . . . . . . . . 5 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 9 recommended operating conditions. . . . . . . . 7 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 7 11 dynamic characteristics . . . . . . . . . . . . . . . . . . 8 12 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 13 package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 14 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 20 15 revision history . . . . . . . . . . . . . . . . . . . . . . . . 20 16 legal information. . . . . . . . . . . . . . . . . . . . . . . 21 16.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 21 16.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 16.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 16.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 17 contact information. . . . . . . . . . . . . . . . . . . . . 21 18 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

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